Singapore-Based iSlate Developer Produces Leaner, Greener Microchips

An international team of computing experts has doubled the efficiency of computer chips.

AsianScientist (Mar. 16, 2011) – An international team of computing experts from the United States, Switzerland and Singapore has developed a new technique for doubling the efficiency of computer chips simply by trimming away the portions that are rarely used.

According to principal investigator Krishna Palem, the Ken and Audrey Kennedy Professor of Computing at Rice University in Houston, who holds a joint appointment at Nanyang Technological University (NTU) in Singapore:

“I believe this is the first time someone has taken an integrated circuit and said, ‘Let’s get rid of the part that we don’t need.’ What we’ve shown is that we can boost performance and cut energy use simultaneously if we prune the unnecessary portions of the digital application-specific integrated circuits that are typically used in hearing aids, cameras and other multimedia devices.”

Palem, who heads the Rice-NTU Institute for Sustainable and Applied Infodynamics (ISAID), and his collaborators at Switzerland’s Center for Electronics and Microtechnology (CSEM) are unveiling the new pruning technique this week in Grenoble, France, at DATE11, the premier European conference on the design, automation and testing of microelectronics.

Pruning is the latest example of “inexact hardware,” the key approach that ISAID is exploring with CSEM to produce the next generation of energy-stingy microchips.

The probabilistic concept is deceptively simple: Slash power demands on microprocessors by allowing them to make mistakes. By cleverly managing the probability of errors and by limiting which calculations produce errors, the designers have found they can simultaneously cut energy demands and boost performance.

Called probabilistic pruning, test prototypes that contain both traditional circuits and pruned circuits on the same silicon chip showed that the pruned circuits were at least two times faster, consumed about half the energy and took up about half the space of the traditional circuits.

“The cost for these gains is an 8 percent error magnitude, and to put that into context, we know that many perceptive types of tasks found in vision or hearing applications can easily tolerate error magnitudes of up to 10 percent,” said Christian Enz, who leads the CSEM arm of the collaboration and is a co-author of the DATE study.

Palem said the next hurdle for “pruning” will be to use the technique to create a complete prototype chip for a specific application. Lingamneni said he hopes to start designing such a chip for a hearing aid this summer.

“Based on what we already know, we believe probabilistic computing can produce application-specific integrated circuits for hearing aids that can run four to five times longer on a set of batteries than current hearing aids,” Palem said. “The collaboration between ISAID and CSEM was key to achieving these results.”

In partnership with a Hyderabad-based non-profit organization, ISAID is undergoing a second phase of testing in Mohd. Hussainpalli village, situated around 110 km southwest of Hyderabad, India.

Palem is best known for developing the iSlate, which requires very low amounts of energy to operate and could run on solar power, bringing the marvels of technology into thousands of rural kids who have never experienced a digital device, computer or video game.

“India’s full economic potential will only be realized with sustainable, low-cost technologies that benefit all segments of the population,” said Palem.

———

Source: Rice University; Photo: Evan White/Chronicle.
Disclaimer: This article does not necessarily reflect the views of AsianScientist or its staff.

Asian Scientist Magazine is an award-winning science and technology magazine that highlights R&D news stories from Asia to a global audience. The magazine is published by Singapore-headquartered Wildtype Media Group.

Related Stories from Asian Scientist